The following patch from PR 3795 fixes 2 issues with unaligned memory
access on the alpha archietcture which would result in kernel panics.

If you have an rl(4) or two and could please try this out on your
alpha system, especially if you have been noticing panics, that would
be great. I don't forrsee any breakage on i386 systems but just to be
sure please take it for a test run on some i386 systems too.

BTW, you can use either 3.6 or -current to test this out.

// Brad

Index: sys/dev/ic/rtl81x9.c
================================================== =================
RCS file: /cvs/src/sys/dev/ic/rtl81x9.c,v
retrieving revision 1.27
diff -u -p -r1.27 rtl81x9.c
--- sys/dev/ic/rtl81x9.c 23 Sep 2004 17:45:16 -0000 1.27
+++ sys/dev/ic/rtl81x9.c 27 Sep 2004 19:40:50 -0000
@@ -667,12 +667,13 @@ rl_rxeof(sc)
if (m == NULL)
ifp->if_ierrors++;
else {
- m_adj(m, ETHER_ALIGN);
m_copyback(m, wrap, total_len - wrap,
sc->rl_cdata.rl_rx_buf);
m = m_pullup(m, sizeof(struct ether_header));
if (m == NULL)
ifp->if_ierrors++;
+ else
+ m_adj(m, ETHER_ALIGN);
}
cur_rx = (total_len - wrap + ETHER_CRC_LEN);
} else {
@@ -1154,7 +1155,8 @@ void rl_stop(sc)
if (sc->rl_cdata.rl_tx_chain[i] != NULL) {
m_freem(sc->rl_cdata.rl_tx_chain[i]);
sc->rl_cdata.rl_tx_chain[i] = NULL;
- CSR_WRITE_4(sc, RL_TXADDR0 + i, 0x00000000);
+ CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(u_int32_t)),
+ 0x00000000);
}
}